Pentium Interrupt Structure

The IA-32 architecture, of which the pentium processors are examples uses two interrupt request lines, a non maskable interrupt and a maskable interrupt, also called user interrupt request or INTR. Interrupt requests on NMI are always accepted by the processor. Request on the INTR are accepted only if they have a higher percentage of privilege level than the program currently executing. INTR interrupts can also be enabled or disabled by setting an interrupt- enable bit in the processor status register. In addition to external interrupts, there are many events that arise during program execution that can cause an exception. These include invalid opcodes, division errors, overflow and many others. They also include trace and breakpoint interrupts. The occurnce of any of these events causes the processor to branch to an interrupt service routine. Each interrupt or exception is assigned a vector number.